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1/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. single-chip type with built-in fet switching regulators flexible step-down switching regulator with built-in power mosfet BD9876EFJ description output 3.0a and below high efficiency rate step-down swit ching regulator power mosfet internal type BD9876EFJ mainly used as secondary side power supply, for example from fixed power supply of 12v, 24v etc, step-down output of 1.2v/1.8v/3.3v/5v, etc, can be produced . this ic has external coil/capacitor down-sizing through 300khz frequency operation, inside nch-fet sw for 45v ?withstand-pressure? commutation and also, high speed load response through current mode control is a simple external setting phase comp ensation system, through a wide range external constant, a compact power supply can be produced easily. features 1) internal 200 m ? nch mosfet 2) output current 3a 3) oscillation frequency 300khz 4) synchronizes to external clock ( 200khz 500khz ) 5) feedback voltage 1.0v1.0% 6) internal soft start function 7) internal over current protect circuit, low in put error prevention circuit, heat protect circuit 8) on/off control through en pin (standby current 0 a typ.) 9) package: htsop-j8 package applications for household machines in general that have 12v/24v lines, etc. absolute maximum rating parameter symbol ratings unit vcc-gnd supply voltage vcc 45 v bst-gnd voltage vbst 50 v bst-lx voltage Svbst 7 v en-gnd voltage ven 45 v lx-gnd voltage vlx 45 v fb-gnd voltage vfb 7 v vc-gnd voltage vc 7 v sync-gnd voltage sync 7 v high-side fet drain current idh 3.5 a power dissipation pd 3.76 (*1) w operating temperature topr -40 +105 storage temperature tstg -55 +150 junction temperature tjmax +150 (*1)during mounting of 70701.6t mm 4layer board (c opper area: 70mm70mm).reduce by 30.08mw for every 1 increase. (above 25 ) operating conditions (ta=25 ) parameter symbol ratings unit min. typ. max. power supply voltage vcc 7 42 v output voltage vout 1.0 (*2) vcc0.7 v (*2)restricted by minimum on pulse typ. 200ns no.11027ebt58
technical note 2/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ electrical characteristics (unless otherwise specified, ta=25 , vcc=24v, vo=5v,en=3v) parameter symbol limits unit conditions min. typ. max. circuit current stand-by current of vcc ist 0 10 a ven=0v circuit current of vcc icc 1 2 ma fb=1.2v under voltage lock out (uvlo) detect voltage vuv 6.1 6.4 6.7 v hysteresis width vuvhy 200 300 mv oscillator oscillating frequency fosc 270 300 330 khz max duty cycle dmax 85 91 97 % error amp fb threshold voltage vfb 0.990 1.000 1.010 v input bias current ifb -1.0 0 1.0 a vfb=0v error amplifier dc gain a vea 700 7000 70000 v/v trans conductance g ea 110 220 440 a/v ivc=10a, vc=1.5v soft start time tsoft 7 10 13 ms current sense amp vc to switch current transconductance g cs 5 10 20 a/v output lx nmos on resistance ronh 200 340 m ? lx pre-charge nmos on resistance ronl 10 17 ? over current detect current iocp 3.5 6 a ctl en pin control voltage on venon 2 vcc v off venoff -0.3 0.8 v en pin input current ren 2.7 5.5 11 a ven=3v sync sync pin control voltage high vsynch 2.0 5.5 v low vsyncl -0.3 0.8 v sync pin input current ren 6 12 24 a vsync=3v sync falling edge to lx rising edge delay tdelay 200 400 600 ns not designed to withstand radiation.
technical note 3/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ pin description pin no. pin name function 1 lx terminal for inductor 2 gnd ground pin 3 vc error amplifier output 4 fb inverting node of the tr ans conductance error amplifier 5 sync input pin of an external signal for the device synchronized by external signal 6 en stand-by on/off pin 7 bst voltage supply pin for high side fet driver 8 vcc voltage input pin block diagram 1 2 34 8 7 65 thermal pad fig.1 pin layout diagram fig.2 block diagram en 1.0v error amp vcc lx reference uvlo vref reg 200m ? soft start on/off gnd + - + fb bst tsd shutdown 10? vc r q s current comparator vout sync oscillator 300khz + - current sense a mp
technical note 4/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ block description 1. reference this block generates error amp standard voltage. standard voltage is 1.0v. 2. reg this is a gate drive voltage generator and 5v low saturation regulator for internal circuit power supply. 3. osc this is a precise wave oscillation circuit with oper ation frequency fixed to 300 khz fixed (self-running mode). to implement the synchronization feat ure connect a square wave (hi level: hi gher than 2v low level: lower than 0.8v ) to the sync pin. the synchronization frequency range is 200 khz to 500 khz. after connecting the rising edge of lx will be synchron ized to the falling edge of sync pin signal after 3 count. at the synchronization remove the ex ternal clock, the device transitions self-running mode after 7 microseconds. 4. soft start a circuit that does soft start to t he output voltage of dc/dc comparator, and prevents rush current during start-up. soft start time is set at ic internal, after 10ms from starting-up en pin, standard voltage comes to 1.0v, and output voltage becomes set voltage. 5. error amp this is an error amplifier what detects ou tput signal, and outputs pwm control signal. internal standard voltage is set to 1.0v. also, c and r are connected between the output (vc) pin gnd of error amp as phase compensation elements. (see p.11) 6. icomp this is a voltage-pulse width converter that controls output voltage in response to input voltage. this compares the voltage added to the internal slope wa veform in response to the fet ws current with error amplifier output voltage, controls the widt h of output pulse and outputs to driver. 7. nch fet sw this is an internal commutation sw that converts coil current of dc/dc comparator. it contains 45v? with stand pressure? 200m ? sw. because the current rating of this fet is 3.5a incl uded ripple current, please use at within 3.5a. the device has the circuit of over current protec tion for protecting the fet from over current. to detect ocp 2 times sequentially, the device will stop and after 13 msec restart. 8. uvlo this is a low voltage error prevention circuit. this prevents internal circuit error during increase of power supply voltage and during decline of power supply voltage. it monitors vcc pin voltage and internal reg voltage, and when vcc voltage becomes 6.4v and below, it turns off all output fet and turns off dc/dc comparator output, and soft start circuit resets. now this threshold has hysteresis of 200mv. 9. tsd this is a heat protect (t emperature protect) circuit. when it detects an abnormal temperature exce eding maximum junction temperature (tj=150 ), it turns off all output fet, and turns off dc/dc comparator output. w hen temperature falls, it has/with hysteresis and automatically returns. 10. en with the voltage applied to en pin(6pin), ic on/off can be controlled. when a voltage of 2.0v or more is applied, it tu rns on, at open or 0v application, it turns off. about 550k ? pull-down resistance is contained within the pin.
technical note 5/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ detailed description synchronizes to external clock the sync pin can be used to synchronize the regulator to an ex ternal system clock. to implement the synchronization feature connect a square wave to sync pin. the square wave amplitude must transition lower than 0.8v and higher than 2.0v on the sync pin and have an on time greater than 100ns and an off time greater than 100ns. the synchronization frequency range is 200 khz to 500 khz. the rising edge of the lx will be synchronized to the falling edge of sync pin signal after sync input pulse 3 count. at the synchronization, the external clock is remo ved, the device transitions self-running mode after 7 microseconds. soft start the soft start time of BD9876EFJ is determined by the dcdc operating frequency (self-run mode 300 khz ? 10ms). if synchronization is used at the time of en=on, the soft start time is restricted by sync pin input pulse frequency. sync pin input pulse frequency is fosc_ex khz, the soft start time is expressed by below equation. ocp operation the device has the circuit of over current protec tion for protecting the fet from over current. to detect ocp 2 times sequentially, the device will stop and after 13 msec restart. fig.3 timing chart at synchronization fig.4 timing chart at ocp operation fosc_ex 300 tss = 10 [ms] sync sync_latch lx set the latch for synchronization 400nsec about 7sec vc lx vout ocp ocp_latch set the ocp latch by detecting the ocp current 2 times sequencially output connect to gnd ocp latch reset after 13 msec (300 hz 4000 counts) force the high side fet off by detecting ocp current (pulse by pulse protection) vc voltage discharged by ocp latch ocp threshold vc voltage rising by output connect to gnd
technical note 6/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 -60 -40 -20 0 20 40 60 80 100 120 icc[ua] temp[ ] vcc=12v vcc=24v vcc=36v vcc=42v 0 0.5 1 1.5 2 -60 -40 -20 0 20 40 60 80 100 120 icc[ma] temp[ ] vcc=42v vcc=36v vcc=24v vcc=12v 0 0.5 1 1.5 2 0 5 10 15 20 25 30 35 40 45 icc[ma] vcc[v] temp= \ 40 temp=25 temp=105 250 260 270 280 290 300 310 320 330 340 350 -60 -40 -20 0 20 40 60 80 100 120 frequency[khz] temp[ ] 0 1 2 3 4 5 6 7 8 -60 -40 -20 0 20 40 60 80 100 120 uvlo ? threshold[v] temp[ ] reset ? voltage detect ? voltage 0 10 20 30 40 50 60 70 80 90 100 -60 -40 -20 0 20 40 60 80 100 120 maxduty[%] temp[ ] 0.990 ? 0.992 ? 0.994 ? 0.996 ? 0.998 ? 1.000 ? 1.002 ? 1.004 ? 1.006 ? 1.008 ? 1.010 ? -60 -40 -20 0 20 40 60 80 100 120 vfb ? threshold[v] temp[ ] vcc=12v vcc=24v vcc=42v vcc=36v 0.990 ? 0.992 ? 0.994 ? 0.996 ? 0.998 ? 1.000 ? 1.002 ? 1.004 ? 1.006 ? 1.008 ? 1.010 ? 0 5 10 15 20 25 30 35 40 45 vfb ? threshold[v] vcc[v] temp=105 temp=25 temp= \ 40 \ 60 \ 50 \ 40 \ 30 \ 20 \ 10 0 10 20 30 40 50 60 00.511.52 vc ? terminal ? current[ua] vfb[v] temp=105 temp=25 temp= \ 40 reference data (unless otherwise specified, ta=25 , vcc=24v, vo=5v, en=3v) fig.12. fb threshold power supply characteristics fig.11. fb threshold voltage temperature characteristics fig.13. fb voltage - ivc current characteristics fig.9. oscillation frequency temperature characteristics fig.8. uvlo threshold temperature characteristics fig.10. max duty temperature characteristics fig.5. standby current temperature characteristics fig.7. circuit current temperature characteristics fig.6. circuit current power supply voltage characteristics
technical note 7/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ 0 5 10 15 20 -60 -40 -20 0 20 40 60 80 100 120 precharge ? fet ? ron ? [ ] temp[ ] 0 50 100 150 200 250 300 -60 -40 -20 0 20 40 60 80 100 120 highside ? fet ? ron ? [m ] temp[ ] 0 2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100 120 soft ? start ? time[ms] temp[ ] vcc=42v vcc=36v vcc=24v vcc=12v 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -60 -40 -20 0 20 40 60 80 100 120 vc ? to ? sw ? current ? transconductance[a/v] temp[ ] 0 0.5 1 1.5 2 -60 -40 -20 0 20 40 60 80 100 120 en ? threshold[v] temp[ ] 0 1 2 3 4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 ocp_detect_current[a] temp[ ] vcc=12v vcc=24v vcc=36v vcc=42v fig.17 ocp detect current temperature characteristics fig.14. soft start time temperature characteristics fig.15. nch fet on resistance temperature characteristics fig.16. pre-charge fet on resistance temperature characteristics fig.18. vc to sw current transconductance temperature characteristics fig.19. en threshold temperature characteristics
technical note 8/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ fig.20 reference application circuit fig.27 stop waveform fig.21 electric power conversion rate fig.23 frequency response characteristics (io=3.0a) fig.22 frequency response characteristics (io=0.5a) phase gain fig.26 startup waveform en 5v/div (dc) lx 10v/div (dc il 0.5a/div (dc) vout 2v./div (dc) en 5v/div (dc) lx 10v/div (dc il 0.5a/div (dc) vout 2v./div (dc) fig.24 load response characteristics (io=0a 3.0a) fig.25 load response characteristics (io=3.0a 0a) vout 200mv/div (ac) il 1a/div (dc) vout 200mv/div (ac) il 1a/div (dc) 0 10 20 30 40 50 60 70 80 90 100 0 500 1000 1500 2000 2500 3000 transformation ? efficiency ? [%] load ? current[ma] vcc=12v vcc=24v vcc=36v vcc=42v phase gain example of reference application circuit (input 24v, output 5.0v/ 2.5a) reference application data (example of reference application circuit) vcc 24 v vout c1 6800pf en lx gnd vc fb vcc bst en sync sync 10f/35 v grm31eb3ya106ka12l (murata) 47f/15v grm32eb31c476ke15 (murata) rb056l-40 (rohm) 15h cdrh105r (sumida) 0.01f r3 10k ? r2 30k ? r1 120k ? on/off control 5v/2.5a
technical note 9/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ evaluation board pattern (reference) layout is a critical portion of good powe r supply design. there are several signals paths that conduct fast changing currents or voltages that can interact with stray inductance or parasi tic capacitance to generate noise or degrade the power supplies performance. to help eliminate these problems, the vcc pin s hould be bypassed to ground with a low esr ceramic bypass capacitor with b dielectric. care should be taken to minimize the loop area formed by the bypass capacitor connections, the vcc pin, and the anode of the catch diode. see fig.28 for a pcb layout example. the gnd pin should be tied directly to the thermal pad under the ic and the thermal pad. the thermal pad should be connected to any internal pcb ground pl anes using multiple vias directly under the ic. the lx pin should be routed to the cathode of the ca tch diode and to the output inductor. since the lx connection is the switching node, the catch diode and output induct or should be located close to the lx pi ns, and the area of the pcb conductor minimized to prevent excessive capacitive coupling. for operat ion at full rated load, the top side ground area must provide adequate heat dissipating area. the additional external compo nents can be placed approximately as shown. it may be possible to obtain acceptable performance with alternate pcb layouts, however this layout has been shown to produce good results and is meant as a guideline. fig.28 evaluation board pattern lx gnd vc fb vcc bst en sync output inducto r catch diode output capacito r input bypass capacito r cbst topside ground area compensation network resisto r divide r vout route bst capacito r trace on another la y er to provide with wide path for topside ground signal via thermal via vcc
technical note 10/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ application components selection method (1) inductor something of the shield type that fu lfills the current rating (current valu e ipecac below), with low dcr (direct current resistance element) is recommended. value of inductor influences inductor ripple curr ent and becomes the cause of output ripple. in the same way as the formula below, this ripple current can be made small for as big as the l value of coil or as high as the switching frequency. ipeak =iout + Sil/2 [a] (1) ( : efficiency, S il: output ripple current, f: switching frequency ) for design value of inductor ripple current, pleas e carry out design tentat ively with about 20% 50% of maximum input current. when current that exceeds coil rating flows to the coil, t he coil causes a magnetic saturation, and there are cases wherein a decline in efficiency, oscillation of output happens . please have sufficient margin and select so that peak current does not exceed rating current of coil. (2) output capacitor in order for capacitor to be used in output to reduce out put ripple, low ceramic capacitor of esr is recommended. also, for capacitor rating, on top of pu tting into consideration dc bias characteristics, please use something whose maximum rating has sufficient margin with respect to the output voltage. output ripple voltage is looked for using the following formula. please design in a way that it is held within capacity ripple voltage. (3) output voltage setting error amp internal standard voltage is 1.0v. output voltage is determined as seen in (4) formula. (4) boost capacitor please connect cbst = 0.01f (laminate ceramic capacitor) bet ween bst pin-lx pins as output capacitors of gate drive voltage generator reg(5v). i l fig.29 inductor current fig.30 voltage return resistance setting method vref 1.0v vout error amp r1 r2 fb S il= [a] (2) l vin-vout vin vout f 1 vpp= Sil S il r esr [v] ??? (3) 2 f co 1 vo= 1.0 [v] ??? (4) r2 (r1+r2)
technical note 11/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ (5) about adjustment of dc/dc comp arator frequency characteristics role of phase compensation element cc1, cc2, rc (s ee p.7. example of reference application circuit) stability and responsiveness of loop are controlled thro ugh vc pin which is the output of error amp. the combination of zero and pole that determines stability and responsiveness is adjus ted by the combination of resistor and capacitor that are connected in series to the vc pin. dc gain of voltage return loop can be calculated for using the following formula. here, vfb is feedback voltage (1.0v).a ea is voltage gain of error amplifier (typ: 77db), gcs is the trans-conductance of curr ent detect (typ: 10a/v), and rl is the output load resistance value. there are 2 important poles in the control loop of this dc/dc. the first occurs with/ through the output resistance of p hase compensation capacitor (c1) and error amplifier. the other one occurs with/through the output capacitor and load resistor. these poles appear in the frequency written below. here, g ea is the trans-conductance of error amplifier (typ: 220 a/v). here, in this control loop, one zero becomes important. wi th the zero which occurs because of phase compensation capacitor c1 and phase compensation re sistor r3, the frequency below appears. also, if output capacitor is big, and t hat esr (resr) is big, in this contro l loop, there are cases when it has an important, separate zero (esr zero). this esr zero occurs due to esr of output capacitor and capacitance, and exists in the frequency below. (esr zero) in this case, the 3 rd pole determined with the 2 nd phase compensation capacitor (c2) and phase correction resistor (r3) is used in order to correct the esr zero results in loop gain. this pole exists in the frequency shown below. (pole that corrects esr zero) the target of phase compensation desi gn is to create a communication function in order to acquire necessary band and phase margin. cross-over frequency (band) at which loop gai n of return loop becomes ?0? is important. when cross-over frequency becomes low, power supply fluctuation response, load response, etc worsens. on the other hand, when cross-over frequency is too high, instability of the loop can occur. tentatively, cross-over frequency is targeted to be made 1/20 or below of switching frequency. vout v ag cs rl adc fb ea ? ? ? = ea ea a c1 2 g 1 fp ? ? = rl cout 2 1 fp2 ? ? = r3c1 2 1 1 fz ? ? = resr cout 2 1 fz esr ? ? = r3c2 2 1 3 fp ? ? =
technical note 12/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ selection method of phase compensation constant is shown below. 1. phase compensation resistor (r3) is selected in order to set to the desired cross-over frequency. calculation of rc is done using the formula below. here, fc is the desired cross-over frequency. it is made about 1/20 and below of the normal switching frequency (fs). 2. phase compensation capacitor (c1) is selected in order to achieve the desired phase margin. in an application that has a representati ve inductance value (about several h 20h), by matching zero of compensation to 1/4 and below of the cross-over frequency, sufficient phase margin can be acquired. c1 can be calculated using the following formula. rc is phase compensation resistor. 3. examination whether the sec ond phase compensation capacitor c2 is necessary or not is done. if the esr zero of output capacitor exis ts in a place that is smaller than half of the switching frequency, a second phase compensation capacitor is necessary. in other word s, it is the case wherein the formula below happens. in this case, add the second phase compensation capacitor c2, and match the frequency of the third pole to the frequency fp3 of esr zero. c2 is looked for using the following formula. gcs g ea fc cout 2 ? ? ? ? = v fb vout r3 fc r3 2 4 c1 ?? 2 fs resr cout 2 1 ?? r3 resr cout c2 ? ?
technical note 13/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ i/o equivalent schematic pin. no pin. name pin equivalent schematic pin. no pin. name pin equivalent schematic 1 2 7 8 lx gnd bst vcc 5 sync 3 vc 6 en 4 fb bst vcc lx gnd gnd sync vcc vc gnd fb gnd en gnd
technical note 14/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ notes for use (1) about absolute maximum rating when the absolute maximum ratings of app lication voltage, operating temperature range, etc. was exceeded, there is possibility of deterioration and destruction. also, the short mode or open mode, etc. destru ction condition cannot be assumed. when the special mode where absolute maximum ra ting is exceeded is assumed, please give consideration to the physical safety countermeasure for the fuse, etc. (2) about gnd electric potential in every state, please make the electric potential of gnd pin into the minimum electrical potential. also, include the actual excessive effect, and please do it such that the pins, excluding the gnd pin do not become the voltage below gnd. (3) about heat design consider the power dissipation (pd) in actual state of use, and please make heat design with sufficient margin. (4) about short circuit between pins and erroneous mounting when installing to set board, please be mindf ul of the direction of the ic, phase diff erence, etc. if it is not installed correctly, there is a chance that the ic will be destroyed. also, if a foreign obj ect enters the middle of output, the middle of output and power supply gnd, etc., even for the case where it is shorted, there is a change of destruction. (5) about the operation inside a strong electro-magnetic field when using inside a strong electro-magnetic field, t here is a possibility of error, so please be careful. (6) temperature protect circuit (tsd circuit) temperature protect circuit (tsd circuit) is built-in in this ic. as for the tem perature protect circu it (tsd circuit), because it a circuit that aims to block the ic from insist ent careless runs, it is not ai med for protection and guarantee of ic. therefore, please do not assume t he continuing use after operation of this circuit and the temperature protect circuit operation. (7) about checking with set boards when doing examination with the set board, during connection of capacitor to the pin that has low impedance, there is a possibility of stress in the ic, so for every 1 process, plea se make sure to do electric discharge. as a countermeasure for static electricity, in the process of assembly, do groundin g, and when transporting or storing please be careful. also, when doing connection to the jig in the examination process, please make sure to turn off the power supply, then connect. after that, turn off the power supply then take it off. (8) about common impedance for the power supply and the wire of gnd, lower the comm on impedance, then, as much as possible, make the ripple smaller (as much as possible make the wire thick and short, and lower the ripple from l ? c), etc., then and please consider it sufficiently. (9) in the application, when the mode wh ere the vcc and each pin electrical potentia l becomes reversed exists, there is a possibility that the internal circuit will become damaged. fo r example, during cases wherei n the condition when charge was given in the external capacitor, and the vcc was shor ted to gnd, it is recommen ded to insert the bypass diode to the diode of the back current prevention in t he vcc series or the middle of each pin-vcc. (10) about high-side nch fet please use within 3.5a contained ripple current, because the absolute maximum rating of high-side nch fet is 3.5a. (11) about over current detection the detecting current is the current fl owing through high-side nch fet. output current containing ripple current, therefore the detecting current is the current of the output cu rrent containing ripple current.
technical note 15/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ (12) about ic pin input this ic is a monolithic ic, and between each element, it has p + isolation for element separation and p board. with the n layer of each element and this, the p-n junction is forme d, and the parasitic element of each type is composed. for example, like the diagram below, when resistor and transistor is connected to pin, when gnd (pina) in resistor, when gnd (pina), when gnd (pinb) in transistor (npn), the p-n junction will operate as a parasitic diode. also, during gnd (pin b) in the transistor (npn), through t he n layer of the other elements connected to the above-mentioned parasitic diode , the parasitic npn transistor will operation. on the composition of ic, depending on the electrical potential, the parasitic element will become necessary. through the operation of the parasitic element in terference of circuit operation will arouse, and error, therefore destruction can be caused. therefore please be careful ab out the applying of volt age lower than the gnd (p board) in i/o pin, and the way of using when parasitic element operating. fig.31 example of simple structure of bipolar ic (pin a) gnd gnd p substrate n p n p + p + (pin a) parasitic element resistor transistor (npn) gnd n p n n p + p + (pin b) b n e c gnd n p substrate parasitic element parasitic element
technical note 16/16 www.rohm.com 2011.07 - rev.b ? 2011 rohm co., ltd. all rights reserved. BD9876EFJ ordering part number b d 9 8 7 6 e f j - e 2 part no. part no. package efj : htsop-j8 packaging and forming specification e2: embossed tape and reel (unit : mm) htsop-j8 0.08 s 0.08 m s 1.0max 0.850.05 1.27 0.080.08 0.42 +0.05 - 0.04 1.050.2 0.650.15 4 + 6 ? 4 0.17 +0.05 - 0.03 234 568 (max 5.25 include burr) 7 1 0.545 (3.2) 4.90.1 6.00.2 (2.4) 3.90.1 1pin mark ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs e2 () direction of feed reel 1pin
r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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